Principal/Staff/Senior Engineer, APTD CEM - Advanced Packaging Wafer Level Technology Engineering

Our client is a global technology leader specializing in advanced memory and storage solutions that power next-generation computing and data-driven applications. With strong expertise in semiconductor innovation, the organization develops high-performance memory technologies across DRAM, NAND, and storage platforms for applications spanning data centers, artificial intelligence, mobile devices, client computing, and intelligent edge ecosystems.

Driven by a commitment to technology advancement, operational excellence, and customer-centric innovation, the company plays a significant role in enabling modern digital infrastructure and compute-intensive workloads worldwide.

Responsibilities:

• Develop wafer-level process technologies including wafer thinning and backside metal interconnect.
• Improve process capability, yield, and manufacturing cost.
• Establish process management projects supporting future technology nodes.
• Evaluate, qualify, and implement new equipment and materials.
• Set process parameters for semiconductor manufacturing equipment.
• Drive process quality through inspection, testing, measurement, SPC, DOE, and defect analysis.
• Develop advanced process controls using data analytics.
• Collaborate with Package Integration, Assembly Engineering, Front-End Wafer Fab, Product Engineering, Assembly/Test Engineering, and Global Quality teams.
• Support product transfer from development through qualification to High Volume Manufacturing (HVM).
• Provide Process of Record (POR) and Model of Record (MOR) documentation.

Requirements:

• B.S./M.S./Ph.D. (or equivalent) in Chemical Engineering, Electrical Engineering, Mechanical Engineering, Physics, or related technical discipline.
• 2+ years of semiconductor process development experience, preferably in wafer bonding, plating, warpage control, or advanced packaging.
• Proficiency in Python, R, and SQL.
• Experience with Visual Basic.
• Knowledge of E3, FDC (Fault Detection & Classification), and RMS (Recipe Management System).
• Strong statistical analysis, process modeling, SPC, DOE, and dashboard development skills.
• Strong understanding of semiconductor process interactions, yield, performance, and reliability.
• Excellent problem-solving and root-cause analysis capability.
• Ability to deliver results under aggressive timelines and limited resources.